Texas Instruments SN74LVC573APWR 8-Bit Latch, Transparent, 3 State, 20-Pin TSSOP
- RS Stock No.:
- 662-9089
- Mfr. Part No.:
- SN74LVC573APWR
- Manufacturer:
- Texas Instruments
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PHP362.26
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Units | Per Unit | Per Pack* |
|---|---|---|
| 10 - 10 | PHP32.345 | PHP323.45 |
| 20 - 40 | PHP31.376 | PHP313.76 |
| 50 - 90 | PHP30.121 | PHP301.21 |
| 100 - 190 | PHP28.616 | PHP286.16 |
| 200 + | PHP26.90 | PHP269.00 |
*price indicative
- RS Stock No.:
- 662-9089
- Mfr. Part No.:
- SN74LVC573APWR
- Manufacturer:
- Texas Instruments
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Texas Instruments | |
| Logic Family | LVC | |
| Product Type | Latch | |
| Latch Mode | Transparent | |
| Logic Function | D Type | |
| Number of Bits | 8 | |
| Output Type | 3 State | |
| Polarity | Non-Inverting | |
| Mount Type | Surface | |
| Minimum Supply Voltage | 1.65V | |
| Package Type | TSSOP | |
| Pin Count | 20 | |
| Maximum Supply Voltage | 3.6V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Length | 6.5mm | |
| Series | 74LVC | |
| Height | 1.15mm | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Texas Instruments | ||
Logic Family LVC | ||
Product Type Latch | ||
Latch Mode Transparent | ||
Logic Function D Type | ||
Number of Bits 8 | ||
Output Type 3 State | ||
Polarity Non-Inverting | ||
Mount Type Surface | ||
Minimum Supply Voltage 1.65V | ||
Package Type TSSOP | ||
Pin Count 20 | ||
Maximum Supply Voltage 3.6V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Length 6.5mm | ||
Series 74LVC | ||
Height 1.15mm | ||
Standards/Approvals No | ||
Automotive Standard No | ||
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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