Texas Instruments SN74LVC112AD 2 Flip Flop IC LVC, Differential, 16-Pin SOIC
- RS Stock No.:
- 663-2802
- Mfr. Part No.:
- SN74LVC112AD
- Manufacturer:
- Texas Instruments
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- RS Stock No.:
- 663-2802
- Mfr. Part No.:
- SN74LVC112AD
- Manufacturer:
- Texas Instruments
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Texas Instruments | |
| Product Type | Flip Flop IC | |
| Logic Family | LVC | |
| Input Type | Single Ended | |
| Output Type | Differential | |
| Polarity | Non-Inverting, Inverting | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Minimum Supply Voltage | 1.65V | |
| Maximum Supply Voltage | 3.6V | |
| Pin Count | 16 | |
| Trigger Type | Negative Edge | |
| Flip-Flop Type | JK Type | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Number of Elements per Chip | 2 | |
| Series | 74LVC | |
| Height | 1.58mm | |
| Length | 9.9mm | |
| Width | 3.91mm | |
| Select all | ||
|---|---|---|
Brand Texas Instruments | ||
Product Type Flip Flop IC | ||
Logic Family LVC | ||
Input Type Single Ended | ||
Output Type Differential | ||
Polarity Non-Inverting, Inverting | ||
Mount Type Surface | ||
Package Type SOIC | ||
Minimum Supply Voltage 1.65V | ||
Maximum Supply Voltage 3.6V | ||
Pin Count 16 | ||
Trigger Type Negative Edge | ||
Flip-Flop Type JK Type | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Number of Elements per Chip 2 | ||
Series 74LVC | ||
Height 1.58mm | ||
Length 9.9mm | ||
Width 3.91mm | ||
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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