Nexperia 74HCT4094D,118 1 Surface Shift Register 74HCT SO, 16-Pin
- RS Stock No.:
- 170-8030
- Mfr. Part No.:
- 74HCT4094D,118
- Manufacturer:
- Nexperia
Bulk discount available
Subtotal (1 reel of 2500 units)*
PHP30,875.00
(exc. VAT)
PHP34,575.00
(inc. VAT)
FREE delivery for orders over ₱3,000.00
Temporarily out of stock
- Shipping from September 22, 2026
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Units | Per Unit | Per Reel* |
|---|---|---|
| 2500 - 2500 | PHP12.35 | PHP30,875.00 |
| 5000 - 10000 | PHP11.98 | PHP29,950.00 |
| 12500 - 22500 | PHP11.38 | PHP28,450.00 |
| 25000 + | PHP11.115 | PHP27,787.50 |
*price indicative
- RS Stock No.:
- 170-8030
- Mfr. Part No.:
- 74HCT4094D,118
- Manufacturer:
- Nexperia
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Product Type | Shift Register | |
| Package Type | SO | |
| Logic Family | 74HCT | |
| Mount Type | Surface | |
| Number of Elements | 1 | |
| Minimum Supply Voltage | 4.5V | |
| Pin Count | 16 | |
| Maximum Supply Voltage | 5.5V | |
| Trigger Type | Positive Edge | |
| Maximum Operating Temperature | 125°C | |
| Height | 1.75mm | |
| Series | 74HCT4094 | |
| Length | 10mm | |
| Width | 4 mm | |
| Standards/Approvals | No | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Product Type Shift Register | ||
Package Type SO | ||
Logic Family 74HCT | ||
Mount Type Surface | ||
Number of Elements 1 | ||
Minimum Supply Voltage 4.5V | ||
Pin Count 16 | ||
Maximum Supply Voltage 5.5V | ||
Trigger Type Positive Edge | ||
Maximum Operating Temperature 125°C | ||
Height 1.75mm | ||
Series 74HCT4094 | ||
Length 10mm | ||
Width 4 mm | ||
Standards/Approvals No | ||
Automotive Standard No | ||
The 74HC4094, 74HCT4094 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (D) and two serial outputs (QS1 and QS2) to enable cascading. Data is shifted on the LOW-to-HIGH transitions of the CP input. Data is available at QS1 on the LOW-to-HIGH transitions of the CP input to allow cascading when clock edges are fast. The same data is available at QS2 on the next HIGH-to-LOW transition of the CP input to allow cascading when clock edges are slow. The data in the shift register is transferred to the storage register when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) is HIGH.
Simple control interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units