onsemi MC100EPT26DTG, Logic Level Translator Translator, 8-Pin TSSOP
- RS Stock No.:
- 186-9279
- Mfr. Part No.:
- MC100EPT26DTG
- Manufacturer:
- onsemi
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PHP541.12
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PHP606.05
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|---|---|
| 1 - 9 | PHP541.12 |
| 10 - 24 | PHP524.89 |
| 25 - 49 | PHP509.15 |
| 50 - 74 | PHP493.86 |
| 75 + | PHP479.04 |
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- RS Stock No.:
- 186-9279
- Mfr. Part No.:
- MC100EPT26DTG
- Manufacturer:
- onsemi
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | onsemi | |
| Mounting Type | Surface Mount | |
| Package Type | TSSOP | |
| Output Type | TTL | |
| Pin Count | 8 | |
| Dimensions | 3.1 x 3.1 x 1.95mm | |
| Logic Function | Translator | |
| Maximum Low Level Output Current | 24mA | |
| Maximum High Level Output Current | -3mA | |
| Propagation Delay Test Condition | 20pF | |
| Maximum Operating Supply Voltage | 3.6 V | |
| Maximum Propagation Delay Time @ Maximum CL | 4.1 ns @ 20 pF | |
| Maximum Operating Temperature | +85 °C | |
| Minimum Operating Supply Voltage | 3.6 V | |
| Minimum Operating Temperature | -40 °C | |
| Select all | ||
|---|---|---|
Brand onsemi | ||
Mounting Type Surface Mount | ||
Package Type TSSOP | ||
Output Type TTL | ||
Pin Count 8 | ||
Dimensions 3.1 x 3.1 x 1.95mm | ||
Logic Function Translator | ||
Maximum Low Level Output Current 24mA | ||
Maximum High Level Output Current -3mA | ||
Propagation Delay Test Condition 20pF | ||
Maximum Operating Supply Voltage 3.6 V | ||
Maximum Propagation Delay Time @ Maximum CL 4.1 ns @ 20 pF | ||
Maximum Operating Temperature +85 °C | ||
Minimum Operating Supply Voltage 3.6 V | ||
Minimum Operating Temperature -40 °C | ||
The MC100EPT26 is a 1:2 Fanout Differential LVPECL to LVTTL translator. Because LVPECL (Positive ECL) levels are used only +3.3V and ground are required. The small outline 8-lead SOIC package and the 1:2 fanout design of the EPT26 makes it ideal for applications which require the low skew duplication of a signal in a tightly packed PC board. The VBB output allows the EPT26 to be used in a single-ended input mode. In this mode the VBB output is tied to the D0bar input for a non-inverting buffer or the D0 input for an inverting buffer. If used, the VBB pin should be bypassed to ground via a 0.01 uF capacitor.
1.4ns Typical Propagation Delay
Maximum Frequency > 275 MHz Typical
The 100 Series Contains Temperature Compensation
Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
Open Input Default State
Safety Clamp on Inputs
24mA TTL outputs
Q Outputs will default LOW with inputs open or at VEE VBB Output
Maximum Frequency > 275 MHz Typical
The 100 Series Contains Temperature Compensation
Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
Open Input Default State
Safety Clamp on Inputs
24mA TTL outputs
Q Outputs will default LOW with inputs open or at VEE VBB Output
For these non-cancellable (NC), and non-returnable (NR) products, Terms and Conditions apply.
LVDS Communication
Low Voltage Differential Signaling, or LVDS, is an electrical signaling system that can run at very high speeds over cheap, twisted-pair copper cables.
Applications: Firewire, SATA, SCSI