Infineon SRAM, CY14B101PA-SFXI- 1 MB
- RS Stock No.:
- 181-8377
- Mfr. Part No.:
- CY14B101PA-SFXI
- Manufacturer:
- Infineon
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Units | Per Unit |
|---|---|
| 1 - 9 | PHP964.82 |
| 10 - 24 | PHP935.88 |
| 25 - 49 | PHP907.82 |
| 50 - 99 | PHP880.60 |
| 100 + | PHP854.18 |
*price indicative
- RS Stock No.:
- 181-8377
- Mfr. Part No.:
- CY14B101PA-SFXI
- Manufacturer:
- Infineon
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Infineon | |
| Product Type | SRAM | |
| Memory Size | 1MB | |
| Organisation | 128K x 8 bit | |
| Number of Words | 128k | |
| Number of Bits per Word | 8 | |
| Maximum Random Access Time | 15ns | |
| Address Bus Width | 8bit | |
| Maximum Clock Frequency | 104MHz | |
| Timing Type | Synchronous | |
| Minimum Supply Voltage | 2.4V | |
| Maximum Supply Voltage | 2.6V | |
| Mount Type | Surface | |
| Minimum Operating Temperature | -40°C | |
| Package Type | SOIC | |
| Pin Count | 16 | |
| Maximum Operating Temperature | 85°C | |
| Length | 10.49mm | |
| Width | 7.59 mm | |
| Series | CY14B101PA | |
| Standards/Approvals | No | |
| Height | 2.36mm | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Infineon | ||
Product Type SRAM | ||
Memory Size 1MB | ||
Organisation 128K x 8 bit | ||
Number of Words 128k | ||
Number of Bits per Word 8 | ||
Maximum Random Access Time 15ns | ||
Address Bus Width 8bit | ||
Maximum Clock Frequency 104MHz | ||
Timing Type Synchronous | ||
Minimum Supply Voltage 2.4V | ||
Maximum Supply Voltage 2.6V | ||
Mount Type Surface | ||
Minimum Operating Temperature -40°C | ||
Package Type SOIC | ||
Pin Count 16 | ||
Maximum Operating Temperature 85°C | ||
Length 10.49mm | ||
Width 7.59 mm | ||
Series CY14B101PA | ||
Standards/Approvals No | ||
Height 2.36mm | ||
Automotive Standard No | ||
The Cypress CY14X101PA combines a 1-Mbit nv SRAM[1] with a full-featured RTC in a monolithic integrated circuit with serial SPI interface. The memory is organized as 128K words of 8 bits each. The embedded nonvolatile elements incorporate the Quantum Trap technology, creating the worlds most reliable nonvolatile memory. The SRAM provides infinite read and write cycles, while the Quantum Trap cells provide highly reliable nonvolatile storage of data. Data transfers from SRAM to the nonvolatile elements (STORE operation) takes place automatically at power-down. On power-up, data is restored to the SRAM from the nonvolatile memory (RECALL operation).You can also initiate the STORE and RECALL operations through SPI instruction.
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