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Renesas Electronics 9DB102BGILF, LVDS Buffer 2 TTL Buffer, 20-Pin TSSOP

RS Stock No.:: 217-7929
Mfr. Part No.:: 9DB102BGILF
Manufacturer:: Renesas Electronics

Renesas Electronics 9DB102BGILF, LVDS Buffer 2 TTL Buffer, 20-Pin TSSOP

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Bulk discount available

Subtotal (1 pack of 5 units)*

PHP1,502.82

(exc. VAT)

PHP1,683.16

(inc. VAT)

FREE delivery for orders over ₱3,000.00

In Stock

Plus 120 unit(s) shipping from February 09, 2026

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Units	Per Unit	Per Pack*
5 - 5	PHP300.564	PHP1,502.82
10 - 20	PHP270.862	PHP1,354.31
25 - 95	PHP255.232	PHP1,276.16
100 - 245	PHP222.182	PHP1,110.91
250 +	PHP210.126	PHP1,050.63

*price indicative

RS Stock No.:: 217-7929
Mfr. Part No.:: 9DB102BGILF
Manufacturer:: Renesas Electronics

Specifications

Technical data sheets

Legislation and Compliance

Product Details

Find similar products by selecting one or more attributes.

Select all	Attribute	Value
	Brand	Renesas Electronics
	Number of Drivers	2
	Product Type	LVDS Buffer
	Input Type	TTL
	Sub Type	Buffer
	Output Type	Buffer
	Number of Elements per Chip	2
	Mount Type	Surface
	Package Type	TSSOP
	Pin Count	20
	Minimum Supply Voltage	3V
	Maximum Supply Voltage	3.3V
	Minimum Operating Temperature	-40°C
	ESD Protection	Yes
	Maximum Operating Temperature	85°C
	Series	9DB102
	Standards/Approvals	No
	Height	1.05mm
	Width	4.5 mm
	Length	6.6mm
	Automotive Standard	No

	Select all
	Brand Renesas Electronics
	Number of Drivers 2
	Product Type LVDS Buffer
	Input Type TTL
	Sub Type Buffer
	Output Type Buffer
	Number of Elements per Chip 2
	Mount Type Surface
	Package Type TSSOP
	Pin Count 20
	Minimum Supply Voltage 3V
	Maximum Supply Voltage 3.3V
	Minimum Operating Temperature -40°C
	ESD Protection Yes
	Maximum Operating Temperature 85°C
	Series 9DB102
	Standards/Approvals No
	Height 1.05mm
	Width 4.5 mm
	Length 6.6mm
	Automotive Standard No

Datasheet - 9DB102BGILF

The Renesas Electronics 9DB102 zero-delay buffer supports PCI Express clocking requirements. The 9DB102 is driven by a differential SRC output pair from an IDT CK409/CK410-compliant main clock generator such as the 952601 or 954101. It attenuates jitter on the input clock and has a selectable PLL Band Width to maximize performance in systems with or without Spread- Spectrum clocking.

2 - 0.7 V HCSL differential output pairs

Phase jitter: PCIe Gen2 < 3.1 ps rms

Phase jitter: PCIe Gen1 < 86 ps peak to peak

Supports zero delay buffer mode and fanout mode

Bandwidth programming available

33-110 MHz operation in PLL mode

10-110 MHz operation in Bypass mode

Renesas Electronics 9DB102BGILF, LVDS Buffer 2 TTL Buffer, 20-Pin TSSOP

FREE delivery for orders over ₱3,000.00

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