Infineon NOR 256 MB SPI Flash Memory 16-Pin SOIC

Name: Infineon NOR 256 MB SPI Flash Memory 16-Pin SOIC
Brand: Infineon
SKU: 184-0052
Price: 382.61 PHP
Availability: BackOrder

This image is representative of the product range

Subtotal (1 tray of 338 units)*

PHP115,467.56

(exc. VAT)

PHP129,322.18

(inc. VAT)

Temporarily out of stock

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Units	Per Unit	Per Tray*
338 +	PHP341.62	PHP115,467.56

*price indicative

Specifications

Technical data sheets

Legislation and Compliance

Product Details

Find similar products by selecting one or more attributes.

Select all	Attribute	Value
	Brand	Infineon
	Memory Size	256MB
	Product Type	Flash Memory
	Interface Type	SPI
	Package Type	SOIC
	Pin Count	16
	Organisation	32M x 8 bit
	Mount Type	Surface
	Maximum Clock Frequency	133MHz
	Cell Type	NOR
	Minimum Supply Voltage	2.7V
	Maximum Supply Voltage	3.6V
	Timing Type	Synchronous
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	85°C
	Height	2.55mm
	Length	10.3mm
	Standards/Approvals	No
	Width	7.5mm
	Number of Bits per Word	8
	Number of Words	32M
	Maximum Random Access Time	14.5ns
	Automotive Standard	AEC-Q100
	Series	S25FL256S

	Select all
	Brand Infineon
	Memory Size 256MB
	Product Type Flash Memory
	Interface Type SPI
	Package Type SOIC
	Pin Count 16
	Organisation 32M x 8 bit
	Mount Type Surface
	Maximum Clock Frequency 133MHz
	Cell Type NOR
	Minimum Supply Voltage 2.7V
	Maximum Supply Voltage 3.6V
	Timing Type Synchronous
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 85°C
	Height 2.55mm
	Length 10.3mm
	Standards/Approvals No
	Width 7.5mm
	Number of Bits per Word 8
	Number of Words 32M
	Maximum Random Access Time 14.5ns
	Automotive Standard AEC-Q100
	Series S25FL256S

This family of devices connect to a host system via a SPI. Traditional SPI single bit serial input and output (Single I/O or SIO) is

supported as well as optional two bit (Dual I/O or DIO) and four bit (Quad I/O or QIO) serial commands. This multiple width interface

is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for DDR read commands for SIO, DIO, and QIO that transfer

address and read data on both edges of the clock.

The Eclipse architecture features a Page Programming Buffer that allows up to 128 words (256 bytes) or 256 words (512 bytes) to be

programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase

algorithms.

Executing code directly from flash memory is often called Execute-In-Place or XIP. By using FL-S devices at the higher clock rates

supported, with QIO or DDR-QIO commands, the instruction read transfer rate can match or exceed traditional parallel interface,

asynchronous, NOR flash memories while reducing signal count dramatically.

The S25FL128S and S25FL256S products offer high densities coupled with the flexibility and fast performance required by a variety

of embedded applications. They are ideal for code shadowing, XIP, and data storage.

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