Nexperia 1 Surface Shift Register 74HC DHVQFN, 16-Pin
- RS Stock No.:
- 170-5407P
- Mfr. Part No.:
- 74HC165BQ,115
- Manufacturer:
- Nexperia
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Subtotal 250 units (supplied on a reel)*
PHP2,785.00
(exc. VAT)
PHP3,120.00
(inc. VAT)
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In Stock
- 3,150 unit(s) ready to ship from another location
- Plus 3,000 unit(s) shipping from June 24, 2026
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Units | Per Unit |
|---|---|
| 250 - 600 | PHP11.14 |
| 625 - 1225 | PHP10.694 |
| 1250 - 2475 | PHP10.159 |
| 2500 + | PHP9.55 |
*price indicative
- RS Stock No.:
- 170-5407P
- Mfr. Part No.:
- 74HC165BQ,115
- Manufacturer:
- Nexperia
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Nexperia | |
| Product Type | Shift Register | |
| Package Type | DHVQFN | |
| Logic Family | 74HC | |
| Mount Type | Surface | |
| Number of Elements | 1 | |
| Minimum Supply Voltage | 2V | |
| Pin Count | 16 | |
| Maximum Supply Voltage | 6V | |
| Trigger Type | Positive Edge | |
| Maximum Operating Temperature | 125°C | |
| Length | 3.6mm | |
| Width | 2.6 mm | |
| Standards/Approvals | No | |
| Height | 1mm | |
| Series | 74HC165 | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Nexperia | ||
Product Type Shift Register | ||
Package Type DHVQFN | ||
Logic Family 74HC | ||
Mount Type Surface | ||
Number of Elements 1 | ||
Minimum Supply Voltage 2V | ||
Pin Count 16 | ||
Maximum Supply Voltage 6V | ||
Trigger Type Positive Edge | ||
Maximum Operating Temperature 125°C | ||
Length 3.6mm | ||
Width 2.6 mm | ||
Standards/Approvals No | ||
Height 1mm | ||
Series 74HC165 | ||
Automotive Standard No | ||
- COO (Country of Origin):
- TH
The 74HC165: 74HCT165 are high-speed Si-gate CMOS devices. They are pin compatible with Low-power Schottky TTL (LSTTL). The 74HC165: 74HCT165 are 8-bit parallel-load or serial-in shift registers with complementary serial outputs (Q7 and Q7) available from the last stage. When the parallel load (PL) input is LOW, parallel data from the D0 to D7 inputs are loaded into the register asynchronously. When PL is HIGH, data enters the register serially at the DS input and shifts one place to the right (Q0 → Q1 → Q2, etc.) with each positive-going clock transition. This feature allows parallel-to-serial converter expansion by tying the Q7 output to the DS input of the succeeding stage.
Simple control Interface
I/O expansion
Asynchronous and synchronous load options
High frequency
Cascadable
LED drivers
Key applications
Displays
Control units