Renesas Electronics 854S006AGILF Clock Buffer, 24-Pin 6 SOIC
- RS Stock No.:
- 216-6214
- Mfr. Part No.:
- 854S006AGILF
- Manufacturer:
- Renesas Electronics
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PHP1,633.52
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PHP1,829.54
(inc. VAT)
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Units | Per Unit |
|---|---|
| 1 - 9 | PHP1,633.52 |
| 10 - 24 | PHP1,500.65 |
| 25 - 49 | PHP1,437.62 |
| 50 - 99 | PHP1,383.79 |
| 100 + | PHP1,268.08 |
*price indicative
- RS Stock No.:
- 216-6214
- Mfr. Part No.:
- 854S006AGILF
- Manufacturer:
- Renesas Electronics
Specifications
Technical data sheets
Legislation and Compliance
Product Details
Find similar products by selecting one or more attributes.
Select all | Attribute | Value |
|---|---|---|
| Brand | Renesas Electronics | |
| Product Type | Clock Buffer | |
| Mount Type | Surface | |
| Package Type | SOIC | |
| Pin Count | 24 | |
| Minimum Supply Voltage | 3V | |
| Maximum Supply Voltage | 3.3V | |
| Minimum Operating Temperature | -40°C | |
| Maximum Operating Temperature | 85°C | |
| Standards/Approvals | No | |
| Series | 854S006A | |
| Height | 1mm | |
| Length | 7.8mm | |
| Width | 4.4 mm | |
| Number of Outputs | 6 | |
| Automotive Standard | No | |
| Select all | ||
|---|---|---|
Brand Renesas Electronics | ||
Product Type Clock Buffer | ||
Mount Type Surface | ||
Package Type SOIC | ||
Pin Count 24 | ||
Minimum Supply Voltage 3V | ||
Maximum Supply Voltage 3.3V | ||
Minimum Operating Temperature -40°C | ||
Maximum Operating Temperature 85°C | ||
Standards/Approvals No | ||
Series 854S006A | ||
Height 1mm | ||
Length 7.8mm | ||
Width 4.4 mm | ||
Number of Outputs 6 | ||
Automotive Standard No | ||
The Renesas Electronics 854S006 is a low skew, high performance 1-to-6, Differential-to-LVDS fanout buffer. The CLK, nCLK pair can accept most standard differential input levels. The 854S006 is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and part-to-part skew characteristics make the 854S006 ideal for those clock distribution applications demanding well defined performance and repeatability.
Six differential LVDS outputs
One differential clock input pair
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Maximum output frequency: 1.7GHz
Translates any single-ended input signal to LVDS levels with
resistor bias on nCLK input
Output Skew: 55ps (maximum)
Propagation delay: 850ps (maximum)
Additive phase jitter, RMS: 0.067ps (typical)
Full 3.3V or 2.5V supply
-40°C to 85°C ambient operating temperature