Microchip ARM Cortex A5 Microprocessor SAMA5D2 32 bit ARM 500 MHz 289-Pin LFBGA

RS Stock No.:: 165-6445P
Mfr. Part No.:: ATSAMA5D27C-D1G-CU
Manufacturer:: Microchip

Microchip ARM Cortex A5 Microprocessor SAMA5D2 32 bit ARM 500 MHz 289-Pin LFBGA

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Subtotal 25 units (supplied in a tray)*

PHP30,418.75

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PHP34,069.00

(inc. VAT)

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Units	Per Unit
25 - 99	PHP1,216.75
100 +	PHP1,188.63

*price indicative

RS Stock No.:: 165-6445P
Mfr. Part No.:: ATSAMA5D27C-D1G-CU
Manufacturer:: Microchip

Specifications

Technical data sheets

Legislation and Compliance

Product Details

Find similar products by selecting one or more attributes.

Select all	Attribute	Value
	Brand	Microchip
	Series	SAMA5D2
	Product Type	Microprocessor
	Device Core	ARM Cortex A5
	Data Bus Width	32bit
	Instruction Set Architecture	ARM
	Maximum Clock Frequency	500MHz
	Mount Type	Surface
	Minimum Supply Voltage	1.2V
	Package Type	LFBGA
	Maximum Supply Voltage	3.6V
	Pin Count	289
	Minimum Operating Temperature	-40°C
	Maximum Operating Temperature	85°C
	Standards/Approvals	RoHS
	Length	14mm
	Width	14 mm
	Height	1.2mm
	Automotive Standard	No
	Number of Cores	1

	Select all
	Brand Microchip
	Series SAMA5D2
	Product Type Microprocessor
	Device Core ARM Cortex A5
	Data Bus Width 32bit
	Instruction Set Architecture ARM
	Maximum Clock Frequency 500MHz
	Mount Type Surface
	Minimum Supply Voltage 1.2V
	Package Type LFBGA
	Maximum Supply Voltage 3.6V
	Pin Count 289
	Minimum Operating Temperature -40°C
	Maximum Operating Temperature 85°C
	Standards/Approvals RoHS
	Length 14mm
	Width 14 mm
	Height 1.2mm
	Automotive Standard No
	Number of Cores 1

The SAMA5D27C-D1G System in Package (SiP) integrates the ARM® Cortex®-A5 processor-based SAMA5D27C MPU with 1 Gbit (128 Mbytes) of DDR2-SDRAM in a single package. By combining the high-performance, ultra-low-power SAMA5D2 with DDR2-SDRAM in a single package, PCB routing complexity, area and number of layers is reduced in the majority of cases. This makes board design easier and more robust by facilitating design for EMI, ESD and signal integrity. This SiP targets applications using Linux OS and is available in a BGA289 package.

ARM Cortex-A5 core

Memory Architecture

Memory Management Unit

32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache

128-Kbyte L2 cache configurable to be used as an internal SRAM

1Gb DDR2-SDRAM

One 128-Kbyte scrambled internal SRAM

8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC)

Low-Power Modes

Ultra Low-power mode with fast wakeup capability