onsemi MC100EPT25DGOS, Logic Level Translator Translator ECL to LVTTL, 8-Pin SOIC-NB
- RS Stock No.:
- 186-8831
- Mfr. Part No.:
- MC100EPT25DG
- Manufacturer:
- onsemi
Temporarily out of stock - back order for despatch 11/11/2024, delivery within 10 working days from desptach date
Added
Price Each (In a Tube of 98)
PHP478.885
(exc. VAT)
PHP536.351
(inc. VAT)
| Units | Per Unit | Per Tube* |
| 98 - 98 | PHP478.885 | PHP46,930.73 |
| 196 - 392 | PHP446.192 | PHP43,726.816 |
| 490 - 686 | PHP432.69 | PHP42,403.62 |
| 784 - 882 | PHP405.953 | PHP39,783.394 |
| 980 + | PHP405.006 | PHP39,690.588 |
| *price indicative | ||
- RS Stock No.:
- 186-8831
- Mfr. Part No.:
- MC100EPT25DG
- Manufacturer:
- onsemi
Technical data sheets
Legislation and Compliance
Product Details
The MC100EPT25 is a Differential LVECL/ECL to LVTTL translator. This device requires +3.3V, -3.3V to -5.2V, and ground. The small outline 8-lead SOIC package and the single gate of the EPT25 make it ideal for applications which require the translation of a clock or data signal.
The VBB output allows the EPT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a inverting buffer or the D input for a non-inverting buffer. If used, the VBB pin should be bypassed to ground with at least a 0.01 μF capacitor.
The VBB output allows the EPT25 to also be used in a single-ended input mode. In this mode the VBB output is tied to the D input for a inverting buffer or the D input for a non-inverting buffer. If used, the VBB pin should be bypassed to ground with at least a 0.01 μF capacitor.
1.1ns Typical Propagation Delay
Maximum Frequency > 275 MHz Typical
Operating Range: VCC = 3.0 V to 3.6 V, VEE = -5.5 V to -3.0 V, GND = 0 V
24mA TTL outputs
Q Output will default LOW with inputs open or at GND
VBB Output
Open Input Default State
Safety Clamp on Inputs
Pb-Free Packages are Available
Maximum Frequency > 275 MHz Typical
Operating Range: VCC = 3.0 V to 3.6 V, VEE = -5.5 V to -3.0 V, GND = 0 V
24mA TTL outputs
Q Output will default LOW with inputs open or at GND
VBB Output
Open Input Default State
Safety Clamp on Inputs
Pb-Free Packages are Available
For products that are Customized and under Non-cancellable & Non-returnable, Sales & Conditions apply.
Specifications
Attribute | Value |
|---|---|
| Logic Family | ECL |
| Mounting Type | Surface Mount |
| Package Type | SOIC-NB |
| Output Type | LVTTL |
| Pin Count | 8 |
| Dimensions | 5 x 4 x 1.5mm |
| Logic Function | Translator |
| Maximum Low Level Output Current | 24mA |
| Maximum High Level Output Current | -3mA |
| Translation | ECL to LVTTL |
| Propagation Delay Test Condition | 20pF |
| Maximum Operating Supply Voltage | 3.6 V |
| Maximum Propagation Delay Time @ Maximum CL | 1600 ps @ 20 pF |
| Maximum Operating Temperature | +85 °C |
| Minimum Operating Supply Voltage | 3 V |
| Minimum Operating Temperature | -40 °C |