Nexperia 74LVC273PW,118 1 Flip Flop IC 74LVC, D Type, 20-Pin TSSOP

This image is representative of the product range

Bulk discount available

Subtotal (1 pack of 25 units)*

PHP387.125

(exc. VAT)

PHP433.575

(inc. VAT)

Add to Basket
Select or type quantity
Stock information currently inaccessible - Please check back later

Units
Per Unit
Per Pack*
25 - 100PHP15.485PHP387.13
125 - 225PHP15.02PHP375.50
250 - 725PHP14.42PHP360.50
750 - 1475PHP13.698PHP342.45
1500 +PHP12.876PHP321.90

*price indicative

Packaging Options:
RS Stock No.:
170-5348
Mfr. Part No.:
74LVC273PW,118
Manufacturer:
Nexperia
Find similar products by selecting one or more attributes.
Select all

Brand

Nexperia

Product Type

Flip Flop IC

Logic Family

74LVC

Input Type

Single Ended

Output Type

D Type

Clock Frequency

150MHz

Polarity

Non-Inverting

Mount Type

Surface

Package Type

TSSOP

Minimum Supply Voltage

1.65V

Pin Count

20

Maximum Supply Voltage

3.6V

Minimum Operating Temperature

-40°C

Maximum Propagation Delay Time @ CL

10.5ns

Flip-Flop Type

D Flip-Flop

Trigger Type

Positive Edge

Maximum Operating Temperature

125°C

Number of Elements per Chip

1

Standards/Approvals

No

Length

6.6mm

Height

0.95mm

Automotive Standard

No

COO (Country of Origin):
CN
The 74LVC273 has eight edge-triggered, D-type flip-flops with individual Dn inputs and Qn outputs. The common clock (CP) and Master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each Dn input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW independently of clock or data inputs by a LOW voltage level on the MR input.

Mixed 5 V and 3.3 V applications

Improved signal integrity with integrated termination resistors

High noise immunity

Flow through pin out for easy layout

Wide supply voltage range

Low propagation delay

Overvoltage tolerant input options

Integrated source termination resistor options

Bus hold options

Frequency division

Controlled delays

Interface between asynchronous and synchronous systems