Nexperia 74LVC74APW,118 Dual D Type Flip Flop IC, D Type Flip-Flop, 14-Pin TSSOP
- RS Stock No. 170-5415
- Mfr. Part No. 74LVC74APW,118
- Manufacturer Nexperia
The 74LVC74A is a dual edge triggered D-type flip-flop with individual data (nD) inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the nQ output on the LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition, for predictable operation.
Mixed 5 V and 3.3 V applications
Improved signal integrity with integrated termination resistors
High noise immunity
Flow through pin out for easy layout
Wide supply voltage range
Low propagation delay
Overvoltage tolerant input options
Integrated source termination resistor options
Bus hold options
Frequency division
Controlled delays
Interface between asynchronous and synchronous systems
| Attribute | Value |
|---|---|
| Logic Family | 74LVC |
| Logic Function | D Type |
| Input Type | Single Ended |
| Output Type | D Type Flip-Flop |
| Output Signal Type | Differential |
| Triggering Type | Positive Edge |
| Polarity | Inverting, Non-Inverting |
| Mounting Type | Surface Mount |
| Package Type | TSSOP |
| Pin Count | 14 |
| Set/Reset | Yes |
| Number of Elements per Chip | 2 |
| Maximum Propagation Delay Time @ Maximum CL | 15 ns @ 50 pF |
| Dimensions | 5.1 x 4.5 x 0.95mm |
| Maximum Operating Temperature | +125 °C |
| Propagation Delay Test Condition | 50pF |
| Length | 5.1mm |
| Height | 0.95mm |
| Maximum Operating Supply Voltage | 3.6 V |
| Width | 4.5mm |
| Minimum Operating Temperature | -40 °C |
| Minimum Operating Supply Voltage | 1.65 V |
